Senior Analog/RF Layout Engineer; 7nm/5nm FinFETs
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-16
Listing for:
Jobs via Dice
Full Time
position Listed on 2026-06-16
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Electrical Engineering, Hardware Engineer
Job Description & How to Apply Below
Jobs via Dice is seeking an Analog and Mixed-Signal Layout Engineer in San Jose, California. Candidates should have a strong background in block-level and IP-level Analog layout design, with experience in high-frequency analog and custom digital circuits.
This role requires close coordination with design engineers and remote teams, along with proficiency in Cadence Virtuoso and familiarity with layout principles for advanced processes like FinFET technologies.
Education must include a Bachelor of Science degree, and preference is given for experience with 5nm and 7nm processes.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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