×
Register Here to Apply for Jobs or Post Jobs. X

Senior Analog​/RF Layout Engineer; 7nm​/5nm FinFETs

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Jobs via Dice
Full Time position
Listed on 2026-06-16
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Electrical Engineering, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below
Position: Senior Analog/RF Layout Engineer (7nm/5nm FinFETs)

Jobs via Dice is seeking an Analog and Mixed-Signal Layout Engineer in San Jose, California. Candidates should have a strong background in block-level and IP-level Analog layout design, with experience in high-frequency analog and custom digital circuits.

This role requires close coordination with design engineers and remote teams, along with proficiency in Cadence Virtuoso and familiarity with layout principles for advanced processes like FinFET technologies.

Education must include a Bachelor of Science degree, and preference is given for experience with 5nm and 7nm processes.

#J-18808-Ljbffr
Position Requirements
10+ Years work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary