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Sr. ASIC Design Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Micron Technology, Inc.
Full Time position
Listed on 2026-06-17
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

What’s Encouraged Daily

As a Senior ASIC Design Engineer and domain expert, you will perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing, linting, and CDC. Leverage GenAI and agentic tools to drive efficiency and execution excellence!

Minimum Qualifications
  • 5+ years of proven experience
  • Bachelors degree in Electrical Engineering or Computer Science related major
  • Hands‑on experience with GenAI, including development of agentic MCP and skill‑based tools
  • Proficient in EDA tools and flows, including digital design, simulation, System Verilog, static timing analysis, synthesis, timing closure, and top‑level integration (clock and IO)
  • Knowledge of AI/LLMs and machine learning, as well as PCIe, NVMe, DRAM, NAND interfaces, AXI, CPU architecture, and bus protocols is highly desirable
Preferred Qualifications
  • Master’s degree in Electrical Engineering or Computer Science related majors
  • Familiar with APR flow, DFT, LEC, CDC, and linting
  • Strong collaboration skills and a creative, problem‑solving approach

US base salary range for this full‑time position: $ - $ a year.

Additional compensation may include benefits, bonuses and equity.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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