Senior ASIC Physical Design Engineer - RTL to GDSII
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-17
Listing for:
Cisco Systems, Inc.
Full Time
position Listed on 2026-06-17
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Cisco Systems, Inc. is seeking a Physical Design Engineer based in San Jose, California. In this role, you will drive the RTL-to-GDSII implementation for advanced semiconductor nodes and collaborate across teams to deliver high-performance networking chips.
The ideal candidate will possess extensive ASIC design experience, familiarity with EDA tools like Innovus, and a strong understanding of static timing analysis. Join us and help shape the future of technology.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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