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Senior Virtual Protocols Engineer Emulation & Verification

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Cadence Design Systems
Full Time position
Listed on 2026-06-18
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below
Position: Senior Virtual Protocols Engineer for Emulation & Verification
Cadence Design Systems is seeking a Principal Product Engineer for their Virtual Protocols Team in San Jose. The role involves developing and deploying cutting-edge verification technologies and working directly with customers. Candidates should have strong expertise in software, hardware, and protocols essential for SOC verification. A related degree is required alongside 5-7 years of experience. The position offers a competitive salary range of $136,500 to $253,500, incentive compensation, and comprehensive benefits.
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Position Requirements
10+ Years work experience
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