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Senior/Physical Design Engineer – On-Site AI ASICs
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-18
Listing for:
Astera Labs
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
A technology firm in California is looking for a Senior/Staff Physical Design Engineer to oversee the design of connectivity ASICs for major cloud service providers. The role demands a solid electrical engineering background with 3+ years in SoC products and expertise with backend tools for 7nm technologies or less. Candidates must possess hands-on experience with Cadence/Synopsys tools, and excellent scripting skills in Python, Tcl, or Perl are desired.
This is an on-site position.
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Position Requirements
10+ Years
work experience
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