Senior Electrical Engineer; FPGA/Speed/Mixed-Signal
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-18
Listing for:
Zealogics.com
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Electrical Engineering, Hardware Engineer
Job Description & How to Apply Below
Key Responsibilities
- Define FPGA-centric system architectures for high-throughput data processing platforms
- Partition functionality across FPGA, ADC/DAC, and host interfaces
- Collaborate with FPGA/FW teams on interface definition, timing, and performance
- Design and integrate high-speed interfaces including:
- DDR4/DDR memory subsystems
- PCIe Gen3/Gen4 interfaces
- QSFP (10G/25G/40G/100G) links
- 10G+ Ser Des channels
- Define routing constraints, stack-up, and impedance control
- Ensure signal integrity, timing closure, and link stability
- Design and integrate high-speed ADC/DAC signal chains
- Data Converter Architectures (DCA)
- Precision analog front-end (AFE) circuits
- Develop circuits using low-noise OpAmps, filters, and gain stages
- Optimize performance metrics such as SNR, ENOB, bandwidth, and jitter sensitivity
- Design multi-rail DC/DC power systems for FPGA and high-speed circuits
- Manage power sequencing, noise, ripple, and efficiency
- Ensure power integrity for sensitive ADC and high-speed Ser Des subsystems
- Own schematic design and hardware architecture (Xpedition preferred)
- Guide PCB layout for high-layer-count, high-speed boards
- Lead design reviews focusing on SI/PI/EMI risks
- Ensure manufacturability (DFM) and testability (DFT)
- Lead board bring-up and system integration:
- DDR training
- PCIe and Ser Des link-up
- ADC performance validation
- Signal integrity
- Jitter and noise
- Power coupling and system interaction
- Work closely with FPGA, firmware, software, mechanical, and system engineering teams
- Align electrical design with system-level performance requirements
- Drive cross-domain trade-offs
- Lead architectural decisions and technical reviews
- Mentor junior engineers in high-speed and mixed-signal design
- Drive structured problem-solving across complex systems
- Bachelor’s or Master’s degree in Electrical Engineering or related field
- 8-12+ years of experience in high-speed, FPGA, or mixed-signal systems
- FPGA-based system design experience
- DDR4 memory subsystem design experience
- PCIe / Ser Des / high-speed link experience
- ADC and analog front-end design experienceDC/DC power system design experience
- Strong understanding of:
- Signal Integrity (SI)
- Power Integrity (PI)
- High-speed timing and jitter analysis
- Hands-on experience with FPGA platforms (Intel / Xilinx)
- Experience with:
- High-speed data converters
- Optical interfaces / QSFP modules
- JESD
204 or similar high-speed data links
- Strong PCB design experience with high-speed constraints
- Experience with tools such as:
- Xpedition (Mentor / Siemens)
- SI/PI analysis tools
- Experience in semiconductor equipment, imaging, or instrumentation systems
- Experience with multi-board or modular systems
- Understanding of signal-power-thermal coupling effects
- Full product lifecycle experience (R&D -> NPI -> production)
- Strong ownership mindset and accountability
- Ability to solve complex multi-domain engineering problems
- Excellent communication and cross-functional collaboration skills
Position Requirements
10+ Years
work experience
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