Senior Principal IC Design Verification Application Engineer

The ideal candidate will be energetic, innovative and enthusiastic about helping customers solve their toughest verification problems using Cadence technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA.

As an integral member of the North America Verification Field Applications Engineering (AE) Team, you will work directly with industry-leading semiconductor and system companies to deploy Cadence’s market-leading verification platforms, including cutting‑edge technologies using AI assistants, agentic AI and machine learning. In this customer‑facing role you will provide front‑line technical support in the pre‑ and post‑sales process and work with the account team to devise innovative solutions to address our customers’ most challenging verification problems.

You will own customer success.

In this role, you will develop customer‑specific verification requirements, including advanced verification component development, methodology support, and operation and maintenance of Cadence’s verification tools and services. You will support technical evaluations and benchmark development for Cadence’s market‑leading tools such as the Xcelium simulation platform and the Verisium platform of AI and ML tools for enhanced verification. You will create and conduct technical presentations and product demonstrations for customers.

By working directly with Cadence R&D and driving customer engagements, you will deepen your knowledge of verification tools, unlock expertise in verification methodologies, and elevate your communication, customer, and sales skills. No matter where you are in your career, the experience you gain as an Application Engineer will advance your career opportunities.

• Establish technical credibility and rapport with the customer and become the go-to expert for all of their technical inquiries and support
• In collaboration with R&D, provide in-depth technical assistance to help support advanced verification flows and AI/ML applications to secure design wins
• Champion the customer needs and work closely with R&D and marketing to develop competitive and creative technical solutions
• Understand the competitive landscape and continuously work on differentiating Cadence’s solutions
• Write technical product literature such as application notes and technical articles
• Review new product proposals and device specifications
• Assume technical leadership roles in small teams as needed

• BS, MS, or PhD degree in Computer Science/Engineering, Electrical Engineering, or related field
• 7+ years experience with System Verilog, VHDL, Verilog
• Verification skills such as UVM testbench architecture, development, and debug
• Strong RTL and Testbench debug skills
• Experience in writing scripts (Perl, Python, or Tcl)
• Strong software, HDL design and verification skills
• Ability to quickly analyze verification environments and design complexity
• Strong verbal and written communication skills
• Strong teamwork skills
• Ability to interact effectively with both external customers and R&D teams

• Experience with C/C++/SystemC
• Experience deploying VIP in test benches
• Knowledge of protocols like JTAG, UART, PCIe, AMBA, DDR
• Knowledge of design fundamentals such as architecture, micro‑architecture, HDL and synthesis and timing
• Digital design experience

Annual salary range (California): $143,500 to $266,500. You may also be eligible for incentive compensation: bonus, equity, and benefits. Our benefits programs include paid vacation and paid holidays, a 401(k) plan with employer match, employee stock purchase plan, and a variety of medical, dental, and vision plan options.