More jobs:
SOC Verification Engineers
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-18
Listing for:
Mirafra
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer
Job Description & How to Apply Below
Responsible for ASIC design verification for various processing blocks within a SOC
- Develop and complete test plans for cache coherency verification of ASIC-based SoCs using UVM-based environments.
- Design and implement constrained-random and directed System Verilog test benches targeting multi-level cache hierarchies
- B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
- 8+ years of experience in ASIC verification,
- Strong knowledge of System Verilog and UVM methodology.
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