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SerDes Analog​/Mixed-Signal IC Design Intern; PhD

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Astera Labs
Apprenticeship/Internship position
Listed on 2026-06-18
Job specializations:
  • Engineering
    Electronics Engineer, Electrical Engineering, Systems Engineer
Salary/Wage Range or Industry Benchmark: 55 - 65 USD Hourly USD 55.00 65.00 HOUR
Job Description & How to Apply Below
Position: SerDes Analog/Mixed-Signal IC Design Intern (PhD)
Astera Labs is seeking an Analog/Mixed-Signal Engineer Intern for 2026, located in Irvine or San Jose, CA. This role involves the design and verification of advanced node CMOS products, including PLLs, ADCs, and implementing high-speed mixed-signal circuits. Candidates should be pursuing a Master’s or PhD in Electrical Engineering and possess hands-on experience in analog circuit design, PCB design, and programming.

The position offers $55-65/hour pay plus a housing stipend and relocation bonus.
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