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Senior Physical Design Verification Lead — CPU Tapeouts

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: TSMC
Full Time position
Listed on 2026-06-19
Job specializations:
  • Engineering
    Test Engineer, Quality Engineering, Engineering Design & Technologists, Systems Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below
TSMC is seeking a Physical Design Verification Lead in San Jose, California. This role involves leading end-to-end physical design verification for CPU blocks and managing comprehensive verification checks. The ideal candidate will have a Master’s degree in Electrical Engineering or related field, with 10-20 years of experience in physical implementation and verification roles, and expertise with EDA tools like Innovus/ICC2, Calibre.

Competitive salary range, comprehensive benefits, and opportunities for professional development are provided.
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Position Requirements
10+ Years work experience
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