AI-Enhanced DSP IP Architect -Gen FPGAs
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-19
Listing for:
Altera
Full Time
position Listed on 2026-06-19
Job specializations:
-
Engineering
Job Description & How to Apply Below
Altera is seeking a DSP Design Engineer to oversee the design and implementation of AI-enhanced DSP IP for next-generation FPGA families in San Jose, California. Candidates should have a strong background in DSP design and a Bachelor’s in a relevant field.
The role involves responsibilities from design to verification, requiring experience in DSP and timing analysis tools. The salary range is $142,600 - $206,500 USD, based on qualifications and experience.
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