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AI-Driven Formal Verification Engineer
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-19
Listing for:
ChipAgents
Full Time
position Listed on 2026-06-19
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Chip Agents is seeking a Formal Verification Engineer to work with AI engineering and EDA teams. The role focuses on formal methods and assertion-based verification in semiconductor design. Candidates should have strong expertise in formal verification methodologies and experience with tools like Jasper Gold and System Verilog Assertions.
This position offers a competitive salary ranging from $150K to $350K per year, plus equity and full benefits including unlimited PTO. Join us to shape the future of semiconductor design.
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