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Lead PCIe Subsystem RTL Architect - Front-End

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: TylSemi
Full Time position
Listed on 2026-06-20
Job specializations:
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below

Tyl Semi, located in San Jose, California, is seeking a PCIe Sub-system Front-end RTL Lead. This role involves owning the design and integration of PCIe subsystems for cutting-edge chiplet-based SoCs aimed at high-performance computing and AI silicon.

The ideal candidate will have extensive experience in digital IC design, particularly in PCIe, along with strong System Verilog skills. The position offers an opportunity to lead key technical initiatives and collaborate with cross-functional teams in a dynamic environment.

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