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Senior SerDes Architect -Speed AI Interconnects
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-20
Listing for:
Celero Communications, Inc.
Full Time
position Listed on 2026-06-20
Job specializations:
-
Engineering
Systems Engineer, Electrical Engineering
Job Description & How to Apply Below
Celero Communications, Inc. is seeking a Senior-Principal Ser Des Design Engineer to lead the design of high-speed interconnect technology for next-generation transceivers. The role involves defining architecture and specifications, leading lab validation, and ensuring seamless integration in SOCs.
The ideal candidate will have a Master’s or PhD in Electrical Engineering along with over 10 years of experience in Ser Des design. The annual salary ranges from $150,000 to $250,000, depending on skills and experience.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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