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Post-Silicon Validation Intern - Characterization & Debug

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Cadence
Apprenticeship/Internship position
Listed on 2026-06-21
Job specializations:
  • Engineering
    Test Engineer, Electrical Engineering, Electronics Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 10000 - 60000 USD Yearly USD 10000.00 60000.00 YEAR
Job Description & How to Apply Below

Cadence is seeking a Post-Silicon Validation Engineering Intern to work on-site in San Jose, California. In this role, you will validate system-level and electrical performance of internal silicon test chips while collaborating closely with analog and digital design teams.

The ideal candidate should have a Bachelor’s or master’s degree in electrical engineering and possess strong analytical skills. Experience in the semiconductor industry and scripting for test automation is a plus.

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