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RFIC Design Engineer Intern

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Sky Gig
Full Time, Part Time, Apprenticeship/Internship position
Listed on 2026-06-22
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 10000 - 60000 USD Yearly USD 10000.00 60000.00 YEAR
Job Description & How to Apply Below

We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications applications. This internship is ideal for a student with strong fundamentals in analog/RF circuit design who wants hands-on experience working with experienced RFIC engineers on real product development and help push new hardware innovations forward.

Responsibilities

As an RFIC Design Engineer Intern, you will:

  • Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers, oscillators, PLLs, PAs, VGAs, switches, etc.
  • Perform circuit RF simulations including S-parameters, noise figure, gain, linearity, stability, power consumption, etc.
  • Support layout reviews, parasitic extraction, and post-layout simulations.
  • Assist in the analysis of 2.5D and 3D EM circuit models and simulation outcomes.
  • Work across a cross-functional collaborative team of bright RF engineers.
  • Prepare technical documents and reports, and participate in design reviews and brainstorming sessions.

We are considering full-time/ part-time applicants for Summer 2026 (8-10 weeks) and Fall 2026 (10-14 weeks).

The ideal candidate will have strong technical competency, curiosity, and the ability to take the lead and ownership of a well-defined project. They should also be excited to adapt, learn quickly, and grow in a fast-paced startup environment.

  • Currently pursuing a M.S., or Ph.D. in Electrical Engineering with 2+ years of RFIC design experience.
  • Strong background in RF state-of-the-art CMOS, SOI, or SiGe technologies
  • Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or similar.
  • Deep understanding of system specifications and capable of translating system requirements into circuit requirements at IC level.
  • Experience with RFIC layout and post-layout simulation.
  • Experience with Python, MATLAB, or scripting for data analysis and automation.
  • Prior research, or tapeout experience in RF/analog IC design.
  • Comfortable working and solving problems independently as well as collaboratively within a team.
  • Strong written and oral communication skills in English and comfortable explaining technical concepts to the rest of the team.
  • Paid, full-time, onsite internship at our Bay Area, CA location with competitive salary
  • Opportunity to work with a collaborative and ambitious team developing disruptive products.
  • Opportunities for growth, leadership, and project ownership in a dynamic startup environment.
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