Senior Emulation​/Verification AE

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Join our elite Application Engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2025 World's Best Workplaces™ for the sixth time. As an integral member of the North America Field Applications Engineering (AE) Team, you will work directly with industry‑leading semiconductor and system companies to deploy Cadence’s market‑leading Emulation and FPGA prototyping platforms, Palladium and Protium.

In this customer‑facing role you will provide front‑line technical support in the pre‑ and post‑sales process and work with team members to devise innovative solutions that address our customers’ most challenging emulation and prototyping problems. You will develop customer‑specific requirements, support methodology, and maintain Cadence’s emulation and prototyping tools and services. Additionally, you will support technical evaluations, benchmark development, and deliver technical presentations and product demonstrations for customers.

• Establish technical credibility and rapport with the customer.
• Work closely with an experienced team to become the go‑to expert for technical inquiries and support for emulation and prototyping.
• Provide in‑depth technical assistance in collaboration with R&D to support advanced acceleration, emulation, and prototyping flows and secure design wins.
• Champion customer needs and collaborate with R&D and marketing to develop competitive and creative technical solutions.
• Learn the competitive landscape and continuously work to differentiate Cadence’s solutions.
• Write technical product literature such as application notes and technical articles.

• FPGA prototyping knowledge, including compilation, debug, and performance optimization on FPGA prototyping platforms.
• Experience with hardware accelerators and emulators.
• Education or experience in Verilog and System Verilog.
• Knowledge of design fundamentals such as architecture, microarchitecture, HDLs, synthesis, and timing.
• Lab or internship experience with hands‑on lab bring‑up, debug, chip‑scope, and instrument usage.
• Minimum: M.Sc. or
  
  B.Sc. degree in Computer Science, Engineering, or related field.
• Good understanding of Object‑Oriented Programming and experience in at least one language such as C++, Java, Python, or System Verilog.
• Knowledge of Linux/Unix platforms and scripting languages such as Perl, TCL, or Python.
• Strong verbal and written communication skills in English.
• Self‑motivated, strong teamwork, and strong problem‑solving skills.

The annual salary range for California is $84,000 to $156,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.

• Paid vacation and paid holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• Medical, dental, and vision plan options.
• Additional benefits as outlined by the company.

Cadence is a committed equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.