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Senior FPGA DDR & IO Subsystem Architect
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-07-02
Listing for:
191 Altera Corporation
Full Time
position Listed on 2026-07-02
Job specializations:
-
Engineering
Systems Engineer, Engineering Design & Technologists, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
191 Altera Corporation is looking for a leading architect in High-Speed External Memory systems to develop innovative solutions. The role requires extensive experience in RTL design, memory technologies, and cross-functional collaboration.
The ideal candidate will possess a minimum of a Bachelor's Degree in Electrical Engineering and 10+ years of relevant experience. This position is based in San Jose, California and offers a competitive salary range of $200,400 – $286,000, along with performance-based incentives.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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