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RFIC Design Engineer Perf Analog CMOS

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: WD
Full Time position
Listed on 2026-07-06
Job specializations:
  • Engineering
    Electronics Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 80000 - 110000 USD Yearly USD 80000.00 110000.00 YEAR
Job Description & How to Apply Below
Position: RFIC Design Engineer - High-Perf Analog CMOS

WD in San Jose, California, is looking for a designer responsible for high-performance RF and analog circuit blocks. The successful candidate will work on circuit architecture, design, and layout, ensuring smooth communication with cross-functional teams.

Ideal applicants will have hands-on experience in CMOS design, knowledge of EDA tools, and excellent communication skills. WD offers a commitment to equal opportunities and a supportive environment where innovation thrives.

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