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Silicon -Up & Validation Engineer Gen FPGA

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Lattice Semiconductor
Full Time position
Listed on 2026-07-07
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer, Validation Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 130000 USD Yearly USD 100000.00 130000.00 YEAR
Job Description & How to Apply Below
Position: Silicon Bring-Up & Validation Engineer – Next-Gen FPGA

You'll be at the front line of silicon — validating and characterizing the building blocks of Lattice's next-generation FPGAs from the moment they arrive off the fab line. This is hands-on, high-stakes work: board-level bring-up, IP characterization, debug, and driving silicon from first power-on to production release.

If you thrive in a lab environment and want your fingerprints on cutting-edge programmable silicon, this is your role.

What You'll Do
  • Lead board-level bring-up and validation of FPGA IPs — SERDES (PMA/PCS), DDR (DDR4/DDR5/LPDDR4), DPHY, PLL, DSP, MIPI, Fabric, I/O and more
  • Develop validation and characterization plans from silicon arrival through production release
  • Write test logic RTL and automation scripts to drive validation coverage
  • Characterize datasheet parameters; analyze and present statistical data using tools like JMP or R
  • Debug silicon issues across design, verification, manufacturing, and test teams
  • Support customer escalations post-release as needed
What You Bring
  • 5+ years in silicon or post-silicon validation
  • Degree in Electrical Engineering or related field
  • Hands‑on expertise in high‑speed interface characterization — PCIe, Ethernet, MIPI D‑PHY, USB, Display Port/HDMI, JESD
    204, SDI/Coa Xpress
  • Strong signal integrity and high‑speed board design skills
  • Proficiency in Verilog/VHDL and FPGA development tools
  • Scripting in Python or Perl for test automation
  • Comfortable with bench equipment — BERT, VNA, Oscilloscopes, Protocol Analyzers
  • Strong communicator, self‑driven, and sharp on problem‑solving
Nice to Have
  • Experience with FPGA emulation or prototyping environments
  • Familiarity with statistical analysis tools (JMP, R)
Location

San Jose, CA — Onsite, Full-Time

Why Lattice?

We're the low power FPGA leader — solving problems from the Edge to the Cloud across communications, computing, industrial, automotive, and consumer markets. Our validation engineers don't just test silicon; they shape it.

Competitive compensation | Equity | Benefits | Collaborative culture

Lattice Semiconductor is an equal opportunity employer. We encourage candidates from diverse backgrounds to apply.

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