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SoC Physical Design Engineer, Level

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-07-18
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 150400 - 277600 USD Yearly USD 150400.00 277600.00 YEAR
Job Description & How to Apply Below
Position: SoC Physical Design Engineer, Top Level

In this highly visible role, you will be responsible for implementing complete chip design from netlist to tapeout.

Description
  • Work with the FE team to understand chip architecture and drive physical aspects early in the design cycle.
  • Work with the physical design team to drive methodologies and "best known methods" to streamline physical design work, come up with guidelines and checklists, drive execution, and track progress.
  • Be a focal point for place and route, drive the work among place and route engineers, set goals and milestones, plan short and long‑term work, understand dependencies between different domains like top, STA, block place and route.
  • Resolve design and flow issues related to physical design, identify potential solutions, and drive execution.
Minimum Qualifications
  • Minimum BS with 10+ years experience.
Preferred Qualifications
  • Familiar with aspects of ASIC integration including floor planning, clock and power distribution, global signal planning, I/O planning, and hard IP integration.
  • Experience with typical SoC issues such as multiple voltage and clock domains, ESD strategies, mixed signal block integration, and package interactions.
  • Familiar with a hierarchical design approach, top‑down design, budgeting, timing and physical convergence.
  • Experience integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain.
  • Experience with large SoC designs (>20M gates) with frequencies in excess of 1 GHz using innovative sub‑45nm technologies.
  • Detailed understanding of database management issues.
  • Experience with floor planning tools, P&R flows, global timing verification and physical design verification flows.
  • Familiar with various process‑related design issues including Design for Yield and Manufacturability, multi‑VT strategies and thermal Mgt.

Base pay range for this role is between $150,400 and $277,600, dependent on skills, qualifications, experience, and location.

Apple employees may become shareholders through discretionary employee stock programs, may receive discretionary restricted stock unit awards, may purchase Apple stock at a discount via the Employee Stock Purchase Plan. You’ll also receive benefits including: comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and reimbursement for certain educational expenses—including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.

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