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Senior IC Physical Design Engineer - Synthesis to Signoff
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-07-24
Listing for:
Arrow Electronics
Full Time
position Listed on 2026-07-24
Job specializations:
-
Engineering
Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
Arrow Electronics is seeking a Physical Design Engineer II to drive ASIC partition implementation, including synthesis, place-and-route, and timing convergence. You will collaborate with architects, RTL designers, and DFT engineers to resolve issues and ensure clean signoffs.
Strong PD flow expertise and TCL scripting are highly valued. The role requires 7+ years in physical design, proficiency with Innovus/Tempus/Quantus, and experience in SoC design and sub-7nm processes.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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