Senior ASIC Design Engineer: GenAI-Driven Innovation
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-07-24
Listing for:
Micron Memory Malaysia Sdn Bhd
Full Time
position Listed on 2026-07-24
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
Micron Technology in San Jose, California, seeks a Senior ASIC Design Engineer to own the full ASIC lifecycle—from specs and microarchitecture to design, synthesis, timing, linting and CDC, leveraging GenAI to boost efficiency.
Requirements include 5+ years in ASIC design, a B.S. in EE or CS, proficiency with System Verilog and EDA flows, knowledge of PCIe/NVMe and memory interfaces. A Master’s degree and experience with DFT/CDC are a plus.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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