Lead RTL/SoC Design Engineer for AI/Memory ASICs
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-08-09
Listing for:
TetraMem - Accelerate The World
Full Time
position Listed on 2026-08-09
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer, Test Engineer
Job Description & How to Apply Below
Tetra Mem - Accelerate The World is seeking an experienced RTL design lead for its ASIC/SoC products in the San Jose area. You will drive RTL design, simulation, verification, IP integration, and cross-team collaboration to ensure robust tapeouts.
Responsibilities include mentoring engineers, performing PPA trade-offs, and advancing IPs for AI/in-memory computing. Familiarity with industry tools and architectures is essential.
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