Senior Physical Design Engineer
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-08-10
Listing for:
ACL Digital
Full Time
position Listed on 2026-08-10
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer, Electrical Engineering
Job Description & How to Apply Below
We are seeking a skilled Physical Design Engineer to implement high-performance RISC-V based processor designs from RTL to GDSII. The role involves full-chip and block-level physical implementation, timing closure, power optimization, PPA and sign-off.
Qualification and Required skills:
- Atleast 8 Years of Experience in Block-level physical implementation from RTL to GDSII
- Own advanced physical design tasks including: EM/IR and power grid optimization for high-current blocks, Congestion mitigation and routing-aware floor planning and Clock tree synthesis and skew management across domains.
- Drive signoff closure: DRC, LVS, antenna, ERC, and tapeout readiness using industry-standard tools (e.g., Innovus, ICC2, Calibre, Voltus, Red Hawk).
- Contribute to and improve physical design automation infrastructure using Tcl, Python, Perl, and other scripting tools.
Position Requirements
10+ Years
work experience
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