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Principal Analog IC Designer - High-Speed SerDes Expert

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Cadence
Full Time position
Listed on 2026-08-11
Job specializations:
  • Engineering
    Electronics Engineer
Salary/Wage Range or Industry Benchmark: 137000 - 254000 USD Yearly USD 137000.00 254000.00 YEAR
Job Description & How to Apply Below

Cadence in California seeks a Principal Analog IC Designer responsible for designing and developing analog/mixed-signal circuit blocks from concept through verification, ensuring conformance to customer specifications.

Candidates should have 7+ years in CMOS Ser Des or high-speed I/O, strong jitter and SI knowledge, Cadence CAD tools expertise, and MS or PhD in EE; salary range and benefits are provided. Collaborate with teams to meet performance goals and schedules.

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