Sr Test Engineer

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Experience Level: Professional

Job Type: Regular

Location:

San Jose, CA, US, 95134

Requisition

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense.  to learn how our innovative team is helping connect, protect and power our planet.

Key Responsibilities

• Build test infrastructure for wafer‑level and package‑level RF‑MEMS testing, including probe‑station setups, RF/DC benches, and automated test equipment.
• Develop and maintain automated test programs using LabVIEW, NI Test Stand, and C#, ensuring scalability, repeatability, and production readiness.
• Lead validation strategy
  , defining test plans, characterization matrices, DOE structures, and qualification flows.
• Debug test programs, instrument communication, and hardware setups
  , resolving measurement anomalies and repeatability issues.
• Design, qualify, and maintain probe cards for wafer‑level RF‑MEMS testing.
• Support manufacturing ramp
  , transitioning test programs and hardware into production environments and improving throughput.
• Collaborate cross‑functionally with RF design, MEMS design, process engineering, reliability, and product engineering teams.

Required Skills & Experience

Software & Automation

• Strong experience with LabVIEW for custom measurement routines.
• Expertise in NI Test Stand for sequencing, reporting, and production deployment.
• Proficiency in C# for instrument drivers, automation frameworks, and UI tools.

Hardware & Debugging

• Wafer‑level RF/DC testing experience
  , including probe‑station workflows, and tester calibration.
• Experience with motherboard/PCB design or layout
  , including RF routing and signal integrity.
• Ability to read and interpret schematics for test boards, probe cards, and driver circuits.
• Hands‑on debugging of test programs
  , hardware bring‑up, and instrument communication.
• Experience with probe card design
  , qualification, and maintenance.

Professional Background

• Typically 5+ years in semiconductor test engineering, RF test, MEMS test, or mixed‑signal ATE development.
• Experience supporting both R&D characterization and production test environments.
• Demonstrated ownership of test infrastructure or validation strategy.

Education

• BS/MS/PhD in Electrical Engineering, Computer Science, or related field.

Competitive base salary commensurate with experience: $115,600 - $150,500, relevant for the California Bay Area (subject to change dependent on physical location)

Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability.

Base compensation is one element of Total Rewards offered e information on the Total Rewards package can be shared upon request.

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.