Silicon Verification Engineer — UVM, SystemVerilog & C++
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-08-20
Listing for:
Advanced Micro Devices
Full Time
position Listed on 2026-08-20
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer, Validation Engineer
Job Description & How to Apply Below
Advanced Micro Devices in San Jose, CA is seeking a Silicon Design Verification Engineer to join the SOC Verification Team. You will work on state-of-the-art verification environments using UVM and System Verilog to validate complex IP designs.
You will own block-level test benches, collaborate with RTL engineers to optimize clock gating, and contribute to performance, power-aware, and coverage-driven verification using C++, Python, and formal tools.
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