Principal Post-Silicon Validation Engineer

Principal Post-Silicon Validation Engineer

San Jose, California, United States

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

Samba Nova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the Samba Nova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

We're the team behind post-silicon bring-up, debug, and validation for the high-speed IO and memory subsystems in Samba Nova's Data Scale platform. We own the path from first silicon power-on through field deployment: characterization, stress testing, performance validation, and root-causing issues across silicon, board, and software. We work directly with design, firmware, verification, and system engineering to keep bring-up on schedule, and partner with customer engineering on deployment and RMA debug.

We build our own debug tooling and automation, and apply what we learn to pre-silicon verification to improve coverage on future programs.

Samba Nova is seeking a Principal Engineer to own post-silicon bring-up, debug, and validation of high-speed IO and memory subsystems within the Data Scale® platform. This role is central to delivering reliable, high-performance AI systems 'll lead system-level debug across silicon, board, and software layers, driving issues to root cause from first silicon through field deployment. This is a hands-on role for an engineer with deep expertise in high-speed interfaces and hardware debug, who can operate in ambiguity and execute with high ownership.

• Own post-silicon bring-up and validation of high-speed IO and memory subsystems, spanning characterization, functional validation, stress testing, and performance analysis
• Establish power-on readiness ahead of first silicon, including debug infrastructure, tooling, and contingency planning
• Lead system-level debug to root cause complex issues spanning silicon, board, and software layers
• Drive resolution with design, firmware, verification, and system teams to close issues and keep bring-up on schedule
• Partner with system and customer engineering teams on product validation, deployment, and RMA debug
• Own validation sign-off for product release against stability, performance, and field reliability targets
• Review SoC and board design and SI/PI analysis through a post-silicon debug and deployment lens
• Contribute to pre-silicon verification and emulation to improve bring-up efficiency and coverage
• Build scripts and tooling that automate validation, debug, and data analysis, and scale test coverage across systems
• Advance post-silicon validation methodology and debug infrastructure across programs

• M.S. in Electrical Engineering, Computer Science, or a related field
• 7+ years of experience in post-silicon validation or system bring-up
• Experience with two or more high-speed IO or memory protocols such as PCIe, Ethernet, HBM, CXL, or UCIe
• Proven ability to lead cross-functional debug efforts to root cause and closure
• Strong analytical skills for test development and data analysis
• Proficiency in scripting such as Python and bash
• Clear and effective communicator with a proactive, collaborative approach to problem-solving

• Deep understanding of high-speed Ser Des training and adaptation
• Experience with mixed-signal IO design and validation
• Hands-on lab experience with oscilloscopes, protocol analyzers, and BERTs
• Experience with optical interconnect
• Ability to read and debug C/C++

Base Salary Range: $180,000 - $255,000 USD

Submission Guidelines:
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