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Senior Packaging Architect – 3D/SiP (Hybrid
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-08-23
Listing for:
Renesas
Full Time
position Listed on 2026-08-23
Job specializations:
-
Engineering
Packaging Engineer, Systems Engineer
Job Description & How to Apply Below
Renesas Electronics America in San Jose is seeking a Principal Package Design Engineer to lead next-generation packaging for high-performance semiconductors, focusing on architecture, simulation, and cross-functional collaboration with design, product engineering, manufacturing, and suppliers.
You will drive advanced packaging initiatives (2.5D/3D, SiP, BGA/CSP) and define stack-ups, materials, and interconnect strategies, ensuring manufacturability and reliability through DOE, qualification,
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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