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ASIC Package Engineering Intern​/Co-op: Shape ‑Gen Tech

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: AMD
Full Time, Apprenticeship/Internship position
Listed on 2026-08-30
Job specializations:
  • Engineering
    Packaging Engineer, Quality Engineering, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 34000 - 44000 USD Yearly USD 34000.00 44000.00 YEAR
Job Description & How to Apply Below
Position: ASIC Package Engineering Intern/Co-op: Shape Next‑Gen Tech

AMD is seeking a highly motivated ASIC Package Engineering intern/co-op in San Jose for a hands-on experience in packaging technology. You will work with a team of engineers to bring new packaging solutions to reality and learn to support substrate, interposer, and bump designs for AMD products.

You will analyze yield, assist design verification, and benchmark materials while collaborating with partners to achieve cost-efficient performance. The role is onsite/hybrid for a full-time duration.

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