ASIC Engineer

Silicon Operations Quality And Reliability Team

The Silicon Operations Quality and Reliability team plays a critical role in ensuring the quality, reliability, and production readiness of Cisco Silicon One products. The team #SiOps supports the development and validation of advanced ASICs (Application-Specific Integrated Circuits), which are custom-designed chips that power high-performance networking and data infrastructure solutions. Working closely with Product Test Engineering, DFT, and Design Engineering teams, the group develops and executes qualification, reliability, and RMA testing strategies that help deliver reliable silicon products ir work directly impacts silicon validation, failure analysis, and continuous improvement of manufacturing test coverage across new product revisions.

This is an opportunity to work on advanced semiconductor technologies while solving complex engineering challenges that influence Cisco's networking portfolio.

#Si Ops

Drive qualification, reliability, and RMA testing activities for Silicon One ASIC products using ATE platforms and silicon debug methodologies. Partner with Product Test Engineering, DFT, and Design Engineering teams to define ATE test strategies, qualification hardware requirements, and data analytics workflows that improve silicon quality and production readiness. Perform silicon failure analysis and debug system-level failures down to the flop or cell level to identify root causes and support corrective actions.

Develop and enhance test coverage by defining new patterns and parametric conditions, correlating ATE behavior to system failures, and transitioning validated solutions into volume manufacturing. Analyze qualification and reliability data to identify trends, improve test effectiveness, and strengthen overall product reliability.

• Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or equivalent experience.
• 8+ years of experience in IC test engineering, SoC/VLSI test bring-up, characterization, and production testing.
• Experience with Advantest 93000 Smart scale and Exascale for test program development, silicon debug, and characterization.
• Hands-on experience debugging silicon failures and isolating issues to the flop or cell level.
• Proficiency in C, C++, Java, 93k test methods, and Python.

• Experience with IC component qualification and reliability failure modes.
• Working knowledge of data analysis tools such as JMP, statistical analysis methods, and AI/ML techniques for test data analytics.
• Hands-on experience analyzing component failures at the system level and performing fault isolation.
• Knowledge of electrical and physical failure analysis techniques.
• Strong problem-solving and cross-functional collaboration skills.