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Senior DFT Engineer — Post-Silicon Yield & Debug
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-09-03
Listing for:
Broadcom Inc.
Full Time
position Listed on 2026-09-03
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Broadcom Inc. is seeking a DFT Engineer for the Core Switching Group at our R&D center in San Jose, CA.
You will lead DFT ATPG/MBIST pattern development, debug, and drive yield improvements across wafer sort and final test, working with cross-functional teams and leveraging data analytics to build proactive yield models. The role demands deep CMOS physics knowledge, experience with Tessent, and strong scripting for automation; a Bachelor's degree with 8+ years (or a Master’s with 6+ years) is
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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