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Lead DFT​/ATPG Product Engineer—Impact & Innovation

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Cadence Design Systems
Full Time position
Listed on 2026-09-05
Job specializations:
  • Engineering
    Product Engineer, Test Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 114800 - 213200 USD Yearly USD 114800.00 213200.00 YEAR
Job Description & How to Apply Below

Cadence Design Systems is seeking a highly motivated engineer to join the Modus Test Product Engineering team, focusing on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG).

You will develop product specs and prototypes, collaborate with R&D and Product Validation, and work with field teams and customers to deploy Modus by creating flows, presentations and hands-on debugging in a fast-paced environment.

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