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Advanced Physical Design & Verification Engineer – Hybrid
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-09-07
Listing for:
TSMC - Taiwan Semiconductor Manufacturing Company Limited
Full Time
position Listed on 2026-09-07
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Electrical Engineering, Engineering Design & Technologists
Job Description & How to Apply Below
TSMC Technology, Inc. is seeking an Advanced Physical Design and Verification Engineer in San Jose, CA, to drive physical design checks and ECO-based timing closures.
The role involves DRC/LVS/EM analysis, floor planning, and clock-tree customization in a hybrid work model with four days in office. The candidate should have a Master’s degree in electrical engineering or CS, strength in RTL, Python, and EDA tools, and a background in design verification or related internships.
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