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Senior Physical Design Engineer Speed ASICs; 5nm/3nm
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-09-08
Listing for:
Lumilens
Full Time
position Listed on 2026-09-08
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Lumilens is seeking a Senior Physical Design Engineer to join our silicon design team, developing high‑performance ASICs on 5nm and 3nm TSMC nodes. You will own physical implementation from RTL to GDSII and drive timing and power closure for ultra‑high‑speed designs.
Collaborate with RTL, STA, IP, and verification teams to solve advanced implementation challenges. Proficiency in floor planning, placement, CTS, routing, and RC extraction is essential, along with scripting skills in Tcl or Python
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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