More jobs:
Senior Silicon Development Engineer — DFT
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-09-09
Listing for:
Socket.dev
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer
Job Description & How to Apply Below
AMD in San Jose, CA is seeking a DFT engineer to implement and verify DFT architectures and features. You will perform scan insertion, ATPG pattern generation, and gate-level ATPG verification, contributing to post-silicon yield learning.
The candidate should have hands-on experience with DFT methodologies, Mentor Testkompress or Synopsys Tetramax/DFTMAX, and Verilog RTL design, with strong problem-solving and communication skills.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×