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Senior ASIC Design Engineer - RTL & Timing Expert
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-09-09
Listing for:
Cisco Systems, Inc.
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Cisco Systems, Inc. in the United States seeks an experienced ASIC Design professional to drive micro-architecture and Verilog RTL implementations, collaborating across verification and physical design to meet timing, power, and performance goals.
Join the Common Hardware Group to contribute to Silicon One and other platforms powering Cisco’s AI-era hardware. A strong RTL background and relevant degrees are required, with full tapeout experience preferred.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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