Senior -Speed Layout Architect Memory Interfaces
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-09-09
Listing for:
1000 Micron Technology, Inc.
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
Micron Technology, Inc. in California seeks a Senior/Principal Layout Engineer to drive pathfinding and architecture exploration for next‑gen memory modules and form factors. You will lead layout-driven decisions influencing DDR/LPDDR interfaces, SI/PI budgets, and advanced PCB technologies.
You will mentor engineers, collaborate with SI/PI teams, and help define design envelopes for 10–20+ Gb/s signaling while shaping layout methodologies across programs.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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