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SoC RTL Design Engineer SSDs

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: SK hynix memory solutions
Full Time position
Listed on 2026-09-09
Job specializations:
  • Engineering
    Hardware Engineer, Test Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 110000 - 170000 USD Yearly USD 110000.00 170000.00 YEAR
Job Description & How to Apply Below
Position: SoC RTL Design Engineer — High-Performance SSDs

SK hynix memory solutions America invites engineers to join the System on Chip (SoC) Design Team in San Jose. You will contribute to high‑performance SSD controllers across the design cycle from micro-architecture to tapeout readiness.

Ideal candidates have a BS/MS/PhD in Electrical/Computer Engineering, strong RTL Verilog/System Verilog skills, and familiarity with AMBA, PCIe, NAND, DDR protocols. The role is on site with a competitive compensation package and comprehensive benefits.

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