Semiconductor Packaging Component Quality Engineer

Meet the Team

The Component Quality and Technology (CQT) organization is seeking a detail-oriented and proactive Semiconductor Packaging Component Quality Engineer to be our technical expert in ensuring the highest standards of component integrity. You will use your deep packaging and board-level expertise to evaluate the quality, reliability, and physical integrity of packaged semiconductor components. We are a global team dedicated to ensuring the highest quality standards.

You will work alongside leaders in Quality, Reliability, Component Engineering, and Supply Chain. We pride ourselves on a culture of technical rigor, continuous improvement, and collaborative problem-solving.

• Component Packaging Evaluation: Assess and lead the quality and physical integrity of incoming packaged components from external suppliers.
• Board-Level Reliability: Review supplier-provided data or execute BLR/L2 reliability testing to ensure component-to-board interconnect integrity for best outcomes in SMT manufacturing and long-term field use.
• Failure Analysis (FA): Oversee root-cause analysis on component failures, identifying package-level defects such as delamination, wire bond lifts, die cracking, and solder joint fatigue.
• Vendor Quality Management: Partner with external component suppliers and OSATs to audit packaging processes, review manufacturing reliability data, and resolve package-level reliability excursions.
• Change Assessment: Evaluate supplier-driven package process changes (PCNs) and determine alignment with internal quality standards.

• Bachelor’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field.
• 4+ years of experience in semiconductor quality, packaging reliability, or board-level failure analysis.
• Strong understanding of standard IC packaging types (e.g., BGA, QFN, WLCSP, Flip-Chip) and their associated material, mechanical, and thermal stress behaviors.
• Strong working knowledge of JEDEC and IPC standards regarding packaging, reliability testing, and board-level qualifications.

• Direct experience designing, setting up, and executing Level 2 (L2) / Board Level Reliability (BLR) testing pipelines, including thermal cycling, mechanical shock/drop testing, board flex testing, and continuous daisy-chain resistance monitoring.
• Proficiency with reliability software (e.g. Reliasoft, Weibull++, Minitab or JMP) and CAD/PCB layout viewers (e.g. Allegro, Altium)
• Familiarity with PCB board design principles, footprint layout constraints, and schematic routing that impact package solder joint reliability.
• Formal training in structured problem-solving methodologies (e.g., 8D, 5-Why, Fishbone analysis, Six Sigma Green/Black Belt).

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

The starting salary range posted for this position is $ to $ and reflects the projected…