Memory Integration Architect

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

We are the team defining the future of packaging of complex memory systems! Our Package pathfinding and Architecture organization sits at the intersection of silicon, packaging, systems, and customer needs—turning complex scaling challenges into technologies that power next generation platforms, through cutting edge packaging technologies. If you enjoy working on problems with real industry impact, look no further!

This is a technical pathfinding role driving forward-looking packaging technology for next generation memory systems from datacenter to edge-AI. You will leverage understanding of end to end memory system architectures, to guide long term package technology direction, and partner with customers, to build innovative ideas into scalable products. You will interface between package process technology, materials, electrical, thermo-mechanical and system performance areas to guide the package strategic roadmaps for Micron.

Responsibilities:

Define next‑generation package pathfinding and system architectures optimizing for speed performance, system bandwidth, power, capacity, thermal, mechanical and electrical performance.

Lead cross‑stack co‑optimization across silicon, package, board, and system with package centric solutions approach

Drive long‑term memory technology packaging strategy and influence industry standards

Work closely with silicon, and system design teams and customers for next generation and long term disruptive solutions to boost speed performance for edge-AI and datacenter memory products

Serve as a technical interface to internal partners, customers, BUs, senior leaders.

Develop AI based multi-physics solutions for efficiency gains

Minimum Qualifications:

Master’s degree or equivalent practical experience in EE, CE, CS, or related field6+ years of Extensive hands‑on experience in memory systems package design, signaling, IO design, PDN design

Deep understanding of memory timing, signaling, power, package process technology working knowledge of EDA tools for design, analysis and simulation of electronic packaging, including but not limited to Cadence, Siemens and Ansys tools

Experience applying AI or LLMs for engineering efficiency

Preferred Qualifications:

Master’s degree or PhD in a related technical field

Recognized technical leadership across multiple products

Experience in Signal and Power integrity analysis and mechanical and reliability analysis, thermal analysis

Expertise in memory systems architecture

The US base salary range that Micron Technology estimates it could pay for this full-time position is:$ - $ a year Additional compensation may include benefits, bonuses and equity.

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs.

Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

As a world leader in the semiconductor industry, Micron is dedicated to your personal…