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Principal Engineer, PCIe Verification; AI

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: SiMa Technologies, Inc.
Full Time position
Listed on 2026-09-20
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer, Validation Engineer
Salary/Wage Range or Industry Benchmark: 220000 - 296400 USD Yearly USD 220000.00 296400.00 YEAR
Job Description & How to Apply Below

Job Title:

Principal Engineer, PCIe Verification

Job Location:

San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office) Job

Description:

The Design Verification (DV) engineer atSiMa is involved in the functional verification of PCIe controller and PCIe-phy at block, sub-system and MLSoC level. Will also be involved in PCIe bring-up and debug on emulator. Generate required PCIe controller and phy initialization (register programming code sequence) for PCIe bring up in Simulation, emulation and on silicon. Work on UCIe interface verification on next generation projects.

Job Description:
  • Participate in PCIe architecture, micro-architecture, feature discussions and reviews.
  • Define and develop PCIe test bench components using UVM & System Verilog.
  • Bring up and testing of PCIe in block and full-chip test environment.
  • Develop and execute a test plan.
  • Verification execution of PCIe EP/RC functionality and performance measurements.
  • Lead Code coverage reviews and closure. System Verilog Assertion functional coverage development and closure.
  • Manage debug of test and regression failures, as well emulation failures.
  • Work closely with the Architecture, MLSoC Hardware and MLA Software teams.
  • Work with emulation and MLSoC Software team to bring up and debug PCIe.
  • Work in the lab on PCie interface silicon debug with software and systems team as and when needed.
Required Background:
  • BS/MS in EE (Electrical Engineering) or CS (Computer Science) with 12+ years of experience in functional verification and silicon bring-up/debug.
  • Very good current working experience of UVM and System Verilog based verification methodology is a must.
  • Working experience on PCIe protocols Gen4/5.
  • Working experience on PCIe bring-up and debug on Silicon is a plus.
  • Past working experience on UCIe protocols is a plus.
  • Proficiency in C/C++/Python programming is a plus.
  • Good debug and problem solving skill.
Personal attributes:

Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and ishighly accountable. Good communication skills.

The annual salary for this position ranges from $220,000 - $296,400. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.

In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.

EEO

Employer:

SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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