Physical Design Lead — Execution
Listed on 2026-09-23
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Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer, Quality Engineering
Job Details:
Job Description:
About Altera Altera builds the programmable logic and adaptive computing solutions that power the world's most demanding systems — from data centers and networking infrastructure to automotive, aerospace, and industrial applications. As an independent FPGA leader, we combine decades of silicon expertise with a startup's focus on speed and innovation. Our engineers work at the edge of process technology and design methodology to deliver silicon that customers can trust, on schedule, every time.
TheOpportunity
We are looking for a Physical Design Lead — Execution (Principal/Sr. Principal Engineer) to drive the day-to-day physical design execution and delivery that gets Altera's chips across the finish line. This is a senior individual-contributor role for an engineer who thrives in the trenches of block and full-chip closure — someone who can take ownership of a design's execution, hold the schedule and quality bar under pressure, and be the steady hand design teams turn to when timelines get tight.
You will be the connective tissue between physical design blocks and full-chip integration, with a clear growth path toward owning full-chip implementation scope. Because this role also represents Altera's physical design execution in front of senior customers, you'll need to be just as comfortable in a candid technical conversation with a customer's technical leadership as you are resolving a critical-path issue days before tapeout.
This role sits on Altera's senior individual-contributor (IC) technical ladder. It is built for deep technical leaders who prefer to lead through expertise, execution, and influence rather than people management — while still shaping how design teams deliver and mentoring the next generation of physical design engineers.
- Execution ownership — Drive day-to-day physical design execution and delivery across blocks and full-chip integration, from floorplan through tapeout.
- Schedule & quality — Own the schedule and quality bar for physical design execution, proactively identifying risk and driving mitigation before it threatens a milestone.
- Cross-block coordination — Coordinate execution across multiple blocks and design teams, resolving conflicts and dependencies so full-chip closure stays on track.
- Scope growth — Grow into ownership of full-chip implementation scope, building the technical judgment and organizational relationships that role demands.
- Customer engagement — Engage senior customer technical stakeholders directly, building rapport and navigating challenging technical conversations with credibility, diplomacy, and influence.
- Escalation & problem-solving — Serve as the escalation point for execution blockers, driving fast, pragmatic resolution under schedule pressure.
- Process discipline — Partner with methodology and CAD teams to ensure execution practices stay aligned with signoff standards and quality gates.
- Mentorship — Mentor physical design engineers on execution best practices, prioritization, and schedule management.
- Block and full-chip milestones hit consistently, even under schedule pressure, with risks surfaced and mitigated early.
- Strong, trusted relationships with senior customer stakeholders who see you as a credible, diplomatic technical partner.
- A smooth, well-prepared expansion into full-chip implementation ownership.
- Design teams that look to you as the steady execution authority when timelines get tight.
Altera offers the scale and technical depth of an established silicon leader with the speed, ownership, and impact of a growth-stage company. On our senior IC ladder, your influence is measured by the designs you deliver and the trust you build — with customers and with…
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