Chip Lead: Digital ASIC Design & Tape- Architect
Listed on 2026-10-07
-
Engineering
Hardware Engineer, Electronics Engineer, Engineering Design & Technologists -
Design & Architecture
Engineering Design & Technologists
Broadcom Inc. in San Jose, California, seeks a Lead ASIC Design Engineer to oversee the design and integration of complex silicon projects. The role requires deep expertise in System Verilog and managing cross-disciplinary teams to achieve design goals.
The ideal candidate will have over 12 years in ASIC/SoC design, a strong history of first-pass silicon tape-outs, and excellent communication skills. Additionally, Broadcom offers a competitive salary ranging from $143,800 to $230,000 and a comprehensive benefits package.
We are seeking a motivated Chip Lead:
Digital ASIC Design & Tape-Out Architect to join Broadcom Inc. in San Jose, CA, United States.
Are you ready to take on the Chip Lead:
Digital ASIC Design & Tape-Out Architect role at Broadcom Inc.?
We would love to welcome a new Chip Lead:
Digital ASIC Design & Tape-Out Architect to our organisation in San Jose, CA, United States.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).