Physical Design Engineer at LanceSoft, Inc. San Jose, CA

Physical Design Engineer – San Jose, CA

Pay rate: $75/hr to $100/hr (W2).

Adding more Info to specs as below-

• Well‑rounded technical leads with extensive experience in large subsystems and full‑chip
• Minimum 2–3 full‑chip executions with End‑to‑End Physical Design activities such as FCT (Full Chip Timing) and FCFP (Full Chip Floor Planning)
• Good communication skills; will represent AW in customer discussions at the customer site
• Must handle complex technical questions from customers

• Work closely with logic design team to define physical architecture and drive physical aspects during the design cycle.
• Collaborate across teams (physical design, logic design, package, DFT, and test).
• Hands‑on synthesis and PnR using industry standard tools for high‑speed digital designs in advanced process nodes.
• Perform all aspects of sign‑off including power, timing, physical verification checks, and design closure.

• 5+ years of experience in Physical Design and timing closure.
• Hands‑on experience in synthesis, PnR, and STA using Cadence/Synopsys tools for complex digital designs in 7nm and below.
• Experience of multiple large SoC tape‑outs in advanced nodes, including hands‑on experience in chip‑level physical design and STA closure.
• Strong experience in SOC/ASIC/GPU/CPU design flows on taped‑out designs, expertise in timing closure at block/chip levels and ECO flows.

• Four options of medical insurance
• Dental and Vision Insurance
• 401(k) Contributions
• Critical Illness Insurance
• Voluntary Permanent Life Insurance
• Accident Insurance
• Other Employee Perks

Lance Soft is a certified Minority Business Enterprise (MBE) and an equal opportunity employer. We prohibit discrimination and harassment of any kind based on race, color, sex, religion, sexual orientation, national origin, disability, genetic information, pregnancy, or any other protected characteristic as outlined by federal, state, or local laws.