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SoC uArchitect​/Architect – Automotive, Safety , ARM Processor Subsystems and Edge AI Platforms

Job in San Jose, Santa Clara County, California, 95112, USA
Listing for: Altera
Full Time position
Listed on 2026-07-05
Job specializations:
  • IT/Tech
    Systems Engineer, Hardware Engineer, Robotics
Salary/Wage Range or Industry Benchmark: 133200 - 190000 USD Yearly USD 133200.00 190000.00 YEAR
Job Description & How to Apply Below
Position: SoC uArchitect / Architect – Automotive, Safety Island, ARM Processor Subsystems and Edge AI Platforms

Job Title:

SoC uArchitect / Architect

At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, automotive, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

Altera is seeking an experienced SoC uArchitect / Architect to help define next-generation FPGA-based heterogeneous platforms for automotive, embedded AI, robotics, video/vision, and safety-critical edge applications. This role is intended for candidates with 8+ years of experience in SoC architecture, processor subsystem design, embedded systems, or heterogeneous compute platforms, with strong exposure to ARM-based SoC development and system-level architecture.

In this role, you will contribute to architecture and microarchitecture definition for ARM processor subsystems, safety islands, interconnect fabrics (AXI/APB), memory systems, and FPGA-to-processor integration for edge platforms. You will work across hardware, software, firmware, verification, and product teams to translate platform requirements into architecture specifications, microarchitecture definitions, IP requirements, and validation-ready designs.

This is a hands-on architecture role where you will be expected to engage deeply in microarchitecture definition, hardware/software interface design, performance tradeoffs, and system-level debug and analysis. Strong exposure to ARM-based SoCs, embedded platforms, or automotive systems is essential, along with a working understanding of how architecture decisions translate into RTL, firmware, and system behavior.

Experience with automotive concepts such as safety islands, fault containment, or ISO 26262 principles is highly valuable, as is experience in embedded AI, video/vision processing, or FPGA-based acceleration platforms.

Responsibilities may include but are not limited to:

  • Define system-level architecture and microarchitecture for FPGA-based heterogeneous SoC platforms targeting automotive, embedded AI, robotics, and edge applications
  • Contribute to ARM processor subsystem architecture, including CPU integration, memory maps, interrupts, boot flows, clocks/resets, and software-visible interfaces
  • Define and refine safety island and real-time subsystem architectures, including fault containment, diagnostics, watchdog mechanisms, and system monitoring
  • Develop interconnect architecture across AXI/APB-based fabrics, including DMA flows, QoS considerations, and peripheral integration
  • Define memory subsystem architecture including DDR interfaces, SRAM, caches, buffering strategies, and data movement optimization
  • Support architecture definition for video/vision and sensor processing pipelines for real-time embedded applications
  • Work on integration between ARM subsystems, FPGA fabric, accelerators, and firmware/software stacks
  • Create architecture and microarchitecture specifications, register definitions, address maps, and performance requirements
  • Collaborate with RTL, design verification, firmware, software, validation, and product teams to ensure architecture execution
  • Participate in architecture reviews, performance analysis, emulation planning, and system debug activities
  • Analyze system performance, identify bottlenecks, and support tradeoff analysis for power, performance, and area optimization
  • Support pre-silicon and post-silicon debug efforts including firmware bring-up and system issue triage
  • Translate platform and customer requirements into scalable architecture decisions and subsystem requirements

Salary Range

$133,200 - $190,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations

Qualifications:

Minimum Qualifications

  • Bachelor's degree in Electrical…
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