Senior, CPU Architecture & Performance Research Engineer

Engineer, CPU Architecture & Performance Research

What You’ll Do

Architecture Research Lab is seeking a Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next‑generation CPU (RISC‑V) cores. This role emphasizes hands‑on analysis, modeling, and close collaboration with architects and design teams to improve performance across real‑world workloads.

You will focus on executing well‑defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy.

Job : 42851

• Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers.
• Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics).
• Identify performance bottlenecks in front‑end, execution engine, or memory subsystems.
• Assist in evaluating design trade‑offs using trace‑driven or cycle‑accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, internal traces).
• Develop scripts and tools to automate performance analysis.
• Work leading to patents and publication.

• Master’s, or PhD in Computer Engineering, Computer Science, or related field.
• 2+ years of experience in CPU microarchitecture and/or performance engineering.
• Strong understanding of:
  • Out‑of‑order execution, branch prediction, pipelines, and speculation.
  • Cache coherence, memory systems, prefetching, and NUMA effects.
• Hands‑on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co‑design.

• Experience with RISC‑V, ARM or x86 architectures.
• Background in power/performance/area (PPA) trade‑off analysis.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Prior tape‑out / patent / publication experience.
• Inclusive mindset: adapt style to diverse global norms.
• Curiosity and resilience, seeking data to build understanding.
• Collaborative spirit, building relationships and offering support.
• Innovative and creative, proactively exploring new ideas and adapting to change.

Base Pay Range: $138,000 – $206,000 USD.

Samsung Semiconductor takes pride in being an equal‑opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.