Senior Distributed Systems Engineer - EDA​/VLSI Platform

About the Role

We’re building a next-generation distributed transistor-level electromigration and IR drop analysis tool. Our team has strong expertise in numerical solvers and circuit simulation algorithms. We need an experienced distributed systems engineer to design the scalable data processing infrastructure for handling massive circuit designs across distributed computing resources.

Architect and develop the core distributed infrastructure for a Python-based platform orchestrating high-performance C++ solvers, focusing on:

• Efficient ingestion pipelines for large-scale netlists and simulation data
• High-performance I/O for multi‑TB circuit databases
• Serialization/deserialization layers bridging Python and C++ components
• Streaming results from distributed solver instances

• Task distribution architecture with fault‑tolerant scheduling for long-running simulations
• Resource management and load balancing across compute clusters
• Monitoring and observability for distributed workflows
• Optimization of task granularity and dependency management

• Scalable visualization for multi-dimensional TB‑scale simulation results
• Interactive data exploration and optimization techniques (downsampling, LOD, progressive rendering)

• 5+ years building production distributed systems with Python
• Deep experience with Dask Distributed or similar frameworks (Spark, Ray, Celery)
• Strong grasp of distributed computing patterns, data locality, and fault tolerance

• Expertise in high-performance I/O (HDF5, Parquet, Arrow, columnar formats)
• Data partitioning strategies, memory-mapped files, zero-copy techniques, streaming patterns
• Python/C++ interop (pybind
  11, Cython, ctypes)

• Experience with large-scale scientific/engineering visualization systems

• Background in EDA, VLSI, semiconductor design, or computational engineering
• HPC experience with job schedulers (Slurm, PBS, LSF)
• GPU acceleration knowledge
• Familiarity with modern languages, tools (Go, Plotly, Bokeh, Holoviews, Datashader)
• Open-source distributed computing contributions

We bring strong expertise in numerical methods and circuit analysis algorithms, well-defined solver interfaces, and a clear technical vision. You’ll build greenfield distributed infrastructure with modern tools, designing the scalable foundation that makes advanced analysis capabilities accessible to chip design engineers.

You're a systems thinker excited about data pipeline architecture and production-scale distributed systems. You understand orchestrating heterogeneous workloads and designing elegant abstractions for distributed computing. You prioritize observability, fault tolerance, and user experience alongside performance.

No circuit simulation expertise needed—that’s our strength. We need your expertise building scalable, reliable infrastructure.

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

Cadence is committed to equal employment opportunity throughout all levels of the organization. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.