ML Research Software Intern: -Chip Parasitic Modeling

Cadence Design Systems in San Jose is seeking a highly motivated software intern to engage in research and development using cutting-edge machine learning technologies focused on on-chip parasitic modeling. The ideal candidate will have a strong algorithm background and programming skills in C/C++, with a Master or PhD degree preferred.

This internship offers hands-on experience in a dynamic environment, along with compensation ranging from $31.63 to $58.75 per hour.

Benefits include paid vacation, 401(k) plan, employee stock purchase plan, and more.

Our organisation is growing, and we are hiring a ML Research Software Intern:
On-Chip Parasitic Modeling in San Jose, CA, United States.

This posting is for the ML Research Software Intern:
On-Chip Parasitic Modeling role at Cadence Design Systems, based in San Jose, CA, United States.

We are looking to fill the ML Research Software Intern:
On-Chip Parasitic Modeling position at Cadence Design Systems in San Jose, CA, United States.